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? 2007-2016 microchip technology inc. ds00002256a-page 1 highlights ? complete system solution for interfacing smart- media ? (sm) or xd picture card ? (xd) 1 , memory stick ? (ms), high speed memory stick (hsms), memory stick pro (mspro), ms duo ? , secure digital (sd), mini-secure digital (mini-sd), trans- flash (sd), multimediacard ? (mmc), reduced size multimediacard (rs-mmc), nand flash, compact flash ? (cf) and cf ultra ? i & ii, and cf form-factor ata hard drives to usb 2.0 bus - supports usb bulk only mass storage com- pliant bootable bios ? support for simultaneous operation of all above devices. (only one at a time of each of the follow- ing groups supported: cf or ata drive, sm or xd or nand, sd or mmc) ? on-chip 4-bit high speed memory stick and ms pro hardware circuitry ? on-chip firmware reads and writes high speed memory stick and ms pro ? 1-bit ecc correction performed in hardware for maximum efficiency ? hardware support for sd security command extensions ? on-chip power fets for supplying flash media card power with minimum board components ? usb bus power certified ? 3.3 volt i/o with 5v input tolerance on vbus/ gpio3 ? complete usb specification 2.0 compatibility for bus powered operation - includes usb 2.0 transceiver - a bi-directional control and a bi-directional bulk endpoint are provided. ? 8051 8 bit microprocessor - provides low speed control functions - 30 mhz execution speed at 4 cycles per instruction average - 12k bytes of internal sram for general pur- pose scratchpad - 768 bytes of internal sram for general pur- pose scratchpad or program execution while re-flashing external rom ? double buffered bulk endpoint - bi-directional 512 byte buffer for bulk end- point - 64 byte rx control endpoint buffer - 64 byte tx control endpoint buffer ? internal or external program memory interface - 64k byte internal code space or optional 64k byte external code space using flash, sram or eprom memory. ? on board 24mhz crystal driver circuit ? can be clocked by 48mhz external source ? on-chip 1.8v regulator for low power core operation ? internal pll for 480mhz usb 2.0 sampling, con- figurable mcu clock ? supports firmware upgrade via usb bus if ?boot block? flash program memory is used ? 15 gpios for special function use: led indica- tors, button inputs, power control to memory devices, etc. - inputs capable of generating interrupts with either edge sensitivity - attribute bit cont rolled features: - activity led polarity/operation/blink rate - full or partial card compliance checking - bus or self powered - lun configuration and assignment - write protect polarity - smartdetach detach from usb when no card inserted for notebook apps - cover switch operation for xd compliance - inquiry command operation - sd write protect operation - older cf card support - force usb 1.1 reporting - internal or external power fet operation ? compatible with microsoft winxp, winme, win2k sp3, apple os10, softconnex, and linux multi- lun mass storage class drivers ? win2k, win98/98se and apple os8.6 and os9 multi-lun mass storage class drivers available from microchip ? 128-pin vtqfp rohs compliant package (14mm x 14mm footprin t, 1.0mm height) 1.xd picture card not applicable to usb2227 usb2227/usb2228 4th generation usb 2.0 flash media controller with integrated card power fets
usb2227/usb2228 ds00002256a-page 2 ? 2007-2016 microchip technology inc. to our valued customers it is our intention to provide our valued customers with the bes t documentation possible to ensure successful use of your micro chip products. to this end, we will continue to improve our publications to better suit your needs. our publications will be refined and enhanced as new volumes and updates are introduced. if you have any questions or comments regarding this publication, please contact the marketing co mmunications department via e-mail at docerrors@microchip.com . we welcome your feedback. most current data sheet to obtain the most up-to-date version of this data s heet, please register at our worldwide web site at: http://www.microchip.com you can determine the version of a data s heet by examining its literature number found on the bottom outside corner of any page . the last character of the literature number is the versi on number, (e.g., ds30000000a is version a of document ds30000000). errata an errata sheet, describing minor operati onal differences from the data sheet and recommended workarounds, may exist for cur- rent devices. as device/doc umentation issues become known to us, we will publish an errata s heet. the errata will specify the revision of silicon and revision of document to which it applies. to determine if an errata sheet exis ts for a particular device, please check with one of the following: ? microchip?s worldwide web site; http://www.microchip.com ? your local microchip sales office (see last page) when contacting a sales office, please spec ify which device, revision of silicon and data sheet (include -literature number) yo u are using. customer notification system register on our web site at www.microchip.com to receive the most current information on all of our products.
? 2007-2016 microchip technology inc. ds00002256a-page 3 usb2227/usb2228 table of contents 1.0 general description ....................................................................................................... ................................................................. 4 2.0 pin configuration ......................................................................................................... ................................................................... 5 3.0 block diagram ............................................................................................................. .................................................................... 6 4.0 pin descriptions .......................................................................................................... .................................................................... 7 5.0 dc parameters ............................................................................................................. ................................................................ 15 6.0 package information ....................................................................................................... .............................................................. 19 7.0 gpio usage ................................................................................................................ .................................................................. 20 appendix a: data sheet revision history ....................................................................................... .................................................... 21 the microchip web site ........................................................................................................ .............................................................. 22 customer change notification service .......................................................................................... ..................................................... 22 customer support .............................................................................................................. ................................................................. 22 product identification system ................................................................................................. ............................................................ 23
usb2227/usb2228 ds00002256a-page 4 ? 2007-2016 microchip technology inc. 1.0 general description the usb2227/usb2228 is a usb 2.0 bulk only mass stor age class peripheral controller intended for supporting com- pactflash (cf and cf ultra i/ii) in true ide mode only, smartmedia (sm) and xd cards, memory stick (ms), memory stick duo (msduo) and memory stick pro (mspro), secure digital (sd), and multim ediacard (mmc) flash memory devices. it provides a single chip solution for t he most popular flash memory cards in the market. the device consists of a usb 2.0 phy and sie, buffers, fast 8051 microprocessor with expanded scratchpad, and pro- gram sram, and cf, ms, sm and sd controllers. the sd co ntroller supports both sd and mmc devices. sm controller supports both sm and xd cards. provisions for external flash memory up to 64k bytes for program storage is provided. 12k bytes of scratchpad sram and 768 by tes of program sram are also provided. fifteen gpio pins are provided for indicators, external se rial eeprom for oem id and system configuration information, and other special functions. internal power fets are provided to directly su pply power to the xd/sm, mmc/sd and ms/mspro cards. the internal rom program is capable of implementing an y combination of single or multi-lun cf/sd/mmc/sm/ms reader functions with individual card power control and activi ty indication. microchip also provides licenses** for win98 and win2k drivers and setup utilities. note: please check with microchip for prec ise features and capabilities for the current rom code release. 1.1 acronyms sm: smartmedia smc: smartmedia controller fm: flash media fmc: flash media controller cf: compact flash cfc: compactflash controller sd: secure digital sdc: secure digital controller mmc: multimediacard ms : memory stick msc : memory stick controller tpc: transport protocol code. ecc: error checking and correcting crc: cyclic redundancy checking
? 2007-2016 microchip technology inc. ds00002256a-page 5 usb2227/usb2228 2.0 pin configuration figure 2-1: usb2227/usb2228 128-pin vtqfp 97 vss 98 rbias 99 atest 100 vdd33 101 vdd18pll 102 xtal1 103 xtal2 104 vsspll 105 gpio9 106 vdd18 107 gpio7 108 vdd33 109 gpio6/romen 110 gpio5 111 gpio4 112 vss 113 gpio2 114 gpio1 115 nreset 116 ma0 117 ma1 118 ma2 119 ma3 120 ma4 121 ma5 122 ma6 123 ma7 124 ma8 125 ma9 126 ma10 127 ma11 128 ma12 64 cf_sa2 63 cf_sa1 62 cf_sa0 61 cf_ncs1 60 cf_ncs0 59 cf_nreset 58 cf_niow 57 cf_nior 56 cf_iordy 55 cf_irq 54 cf_ncd2 53 cf_ncd1 52 cf_d15 51 cf_d14 50 cf_d13 49 vdd18 48 cf_d12 47 vss 46 cf_d11 45 cf_d10 44 gpio11 43 vdd33 42 gpio8 41 cf_d9 40 cf_d8 39 cf_d7 38 cf_d6 37 cf_d5 36 cf_d4 35 cf_d3 34 cf_d2 33 cf_d1 usb2227/2228 vtqfp 128 (top view)
usb2227/usb2228 ds00002256a-page 6 ? 2007-2016 microchip technology inc. 3.0 block diagram figure 3-1: usb2227/ usb2228 block diagram d a t a b u s s usb 2.0 phy ( transciever ) fast 8051 cpu core gpio 12 pins 7 pins configuration and control clock generation x t a l sie ( serial interface engine ) program memory/ io bus interrupt controller latch phase 0, 2 sie latch phase 3 8051 latch phase 1 fmc 60mhz 32 bit osc address x data & sfr address and data busses 64 bytes ep0tx 64 bytes ep0rx 64 bytes ep1tx 64 bytes ep1rx auto address generators address mux data @ 32 bit 15mhz sie control regs address address address address ep0rx_bc ramrd_a/b ep0tx_bc ramwr_a/b 32 bit 15mhz data buss clockout 24 mhz 512 bytes ep2 tx/rx buffer a address register 1.25kb sram 12k byte scratchpad sram #lockedby0hase#lock #lockedby0hase#lock 512 bytes ep2 tx/rx buffer b memory cards scratchpad sram (768 byte ) f mc data mux ecc control/ status sd controller sd/mmc flash media controllers (fmc) control/ status ms controller ms/hs ms/ms pro control/ status sm controller sm/ssfdc control/ status cf controller cf control/ status crc mem/io bus 29pins data data data data crc ep1tx_bc ep1rx_bc address address flash media dma unit 64k rom romen pwr_fet0 pwr_fet1 pwr_fet2 gpio11/crd_pwr2 gpio10/crd_pwr1 gpio8/crd_pwr0
? 2007-2016 microchip technology inc. ds00002256a-page 7 usb2227/usb2228 4.0 pin descriptions this section provides a detailed description of each signal. the signals are arranged in functional groups according to their associated interface. the ?n? symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a low voltage level. when ?n? is not present befor e the signal name, the signal is asserted when at the high voltage level. the terms assertion and negation are used exclusively. this is done to avoid confusion when working with a mixture of ?active low? and ?active high? signal. the term assert, or assertion indicates that a signal is active, independent of whether that level is represented by a high or low voltage. the term negate, or negation indicates that a signal is inactive. 4.1 pin descriptions symbol 128-pin vtqfp buffer type description compactflash (in true ide mode) interface cf_ncs1 61 o8pu cf chip select 1: this pin is the active low chip select 1 signal for the cf ata device. cf_ncs0 60 o8pu cf chip select 0: this pin is the active low chip select 0 signal for the task file registers of cf ata device in the true ide mode. cf_sa2 64 o8 cf register address 2: this pin is the register select address bit 2 for the cf ata device. cf_sa1 63 o8 cf register address 1: this pin is the register select address bit 1 for the cf ata device. cf_sa0 62 o8 cf register address 0: this pin is the register select address bit 0 for the cf ata device. cf_irq 55 ipd cf interrupt: this is the active high interrupt request signal from the cf device. cf_d[15:8] 52 51 50 48 46 45 41 40 i/o8pd cf data 15-8: the bi-directional data signals cf_d15-cf_d8 in true ide mode data transfer. in the true ide mode, all of task file register operation occur on the cf_d[7:0], while the data transfer is on cf_d[15:0]. the bi-directional data signal has an internal weak pull-down resistor. cf_d[7:0] 39 38 37 36 35 34 33 32 i/o8pd cf data 7-0: the bi-directional data signals cf_d7-cf_d0 in the true ide mode data transfer. in the true ide mode, all of task file register operation occur on the cf_d[7:0], while the data transfer is on cf_d[15:0]. the bi-directional data signal has an internal weak pull-down resistor. cf_iordy 56 ipu io ready: this pin is active high input signal. this pin has an internally controlled weak pull-up resistor.
usb2227/usb2228 ds00002256a-page 8 ? 2007-2016 microchip technology inc. cf_ncd2 54 ipu cf card detection2: this card detection pin is connected to the ground on the cf device, when the cf device is inserted. this pin has an internally controlled weak pull-up resistor. cf_ncd1 53 ipu cf card detection1: this card detection pin is connected to ground on the cf device, when the cf device is inserted. this pin has an internally controlled weak pull-up resistor. cf_nreset 59 o8 cf hardware reset: this pin is an active low hardware reset signal to cf device. cf_nior 57 o8 cf io read: this pin is an active low read strobe signal for cf device. cf_niow 58 o8 cf io write strobe: this pin is an active low wr ite strobe signal for cf device. smartmedia interface sm_nwp 74 o8pd sm write protect: this pin is an active low write protect signal for the sm device. this pin has a weak pull-down resistor that is permanently enabled. sm_ale 73 o8pd sm address strobe: this pin is an active high address latch enable signal for the sm device. this pin has a weak pull-down resistor that is permanently enabled. sm_cle 75 o8pd sm command strobe: this pin is an active high command latch enable signal for the sm device. this pin has a weak pull-down resistor that is permanently enabled. sm_d[7:0] 72 71 70 69 68 67 66 65 i/o8pd sm data 7-0: these pins are the bi-directional data signal sm_d7-sm_d0. the bi-directional data signal has an internal weak pull-down resistor. sm_nre 81 08pu sm read enable: this pin is an active low read strobe signal for sm device. when using the internal fet, this pin has an internal weak pull- up resistor that is tied to the output of the internal power fet. 08 if an external fet is used (int ernal fet is disabled), then the internal pull-up is not available (external pull-ups must be used, and should be connected to the applicable card power supply). symbol 128-pin vtqfp buffer type description
? 2007-2016 microchip technology inc. ds00002256a-page 9 usb2227/usb2228 sm_nwe 82 o8pu sm write enable: this pin is an active low write strobe signal for sm device. when using the internal fet, this pin has an internal weak pull- up resistor that is tied to the output of the internal power fet. 08 if an external fet is used (int ernal fet is disabled), then the internal pull-up is not available (external pull-ups must be used, and should be connected to the applicable card power supply). sm_nwps 76 ipu sm write protect switch: a write-protect seal is detected, when this pin is low. this pin has an internally controlled weak pull-up resistor. sm_nb/r 77 i sm busy or data ready: this pin is connected to the bsy/rdy pin of the sm device. an external pull-up resistor is required on this signal. the pull-up resistor must be pulled up to the same power source that powers the sm/nand flash device. sm_nce 83 o8pu sm chip enable: this pin is the active low chip enable signal to the sm device. when using the internal fet, this pin has an internal weak pull- up resistor that is tied to the output of the internal power fet. 08 if an external fet is used (int ernal fet is disabled), then the internal pull-up is not available (external pull-ups must be used, and should be connected to the applicable card power supply). sm_ncd 78 ipu sm card detection: this is the card detection signal from sm device to indicate if the device is inserted. this pin has an internally controlled weak pull-up resistor. memory stick interface ms_bs 24 o8 ms bus state: this pin is connected to the bs pin of the ms device. it is used to control the bus stat es 0, 1, 2 and 3 (bs0, bs1, bs2 and bs3) of the ms device. ms_sdio/ms_d 0 19 i/o8pd ms system data in/out: this pin is a bi-directional data signal for the ms device. most significant bit (msb) of each byte is transmitted first by either msc or ms device. the bi-directional data signal has an internal weak pull-down resistor. ms_d1 20 i/o8pd ms system data in/out: this pin is a bi-directional data signal for the ms device. this pin has internally controlled weak pull-up and pull-down resistors for various operational modes. symbol 128-pin vtqfp buffer type description
usb2227/usb2228 ds00002256a-page 10 ? 2007-2016 microchip technology inc. ms_d[3:2] 22 21 i/o8pd ms system data in/out: this pin is a bi-directional data signal for the ms device. the bi-directional data signal has an internal weak pull-down resistor. ms_ins 18 ipu ms card insertion: this pin is the card detection signal from the ms device to indicate, if the device is inserted. this pin has an internally controlled weak pull-up resistor. ms_sclk 23 o8 ms system clk: this pin is an output clock signal to the ms device. the clock frequency is software configurable. sd interface sd_dat[3:0] 29 28 27 26 i/o8pu sd data 3-0: these are bi-directional data signals. these pins have internally controlled weak pull-up resistors. sd_clk 31 o8 sd clock: this is an output clock signal to sd/mmc device. the clock frequency is software configurable. sd_cmd 30 i/o8pu sd command: this is a bi-directional signal that connects to the cmd signal of sd/mmc device. this pin has an internally controlled weak pull-up resistor. sd_nwp 25 ipd sd write protected: this pin is an input signal with an internal weak pull-down. this pin has an internally controlled weak pull-down resistor. usb interface usbdm usbdp 87 88 io-u usb bus data: these pins connect to the usb bus data signals. rbias 98 i usb transceiver bias: a 12.0k ? , ? 1.0% resistor is attached from vssa to this pin, in order to set the transceiver?s internal bias currents. atest 99 aio analog test: this signal is used for testing the analog section of the chip and should be connected to vdda33 for normal operation. vdd18pll 101 1.8v power for the pll vsspll 104 pll ground reference: ground reference for 1.8v pll power vdda33 89 3.3v analog power vssa 86 analog ground reference: analog ground reference for 3.3v analog power. symbol 128-pin vtqfp buffer type description
? 2007-2016 microchip technology inc. ds00002256a-page 11 usb2227/usb2228 xtal1/ clkin 102 iclkx crystal input/e xternal clock input: 24mhz crystal or external clock input. this pin can be connected to o ne terminal of the crystal or can be connected to an external 24mhz clock when a crystal is not used. note: the ma[2:0] pins will be sampled while nreset is asserted, and the value will be latched upon nreset negation. this will determine the clock source and value. xtal2 103 oclkx crystal output: 24mhz crystal this is the other terminal of the crystal, or left open when an external clock source is used to drive xtal1/clkin. it may not be used to drive any external circuitry other than the crystal circuit. memory i/o interface md[7:0] 12 11 10 9 8 7 6 5 i/o8pu memory data bus: when romen bit of gpio_in1 register = 0, these signals are used to transfer data between the internal cpu and the external program memory. these pins have internally controlled weak pull-up resistors. ma[15:3] 4 2 1 128 127 126 125 124 123 122 121 120 119 o8 memory address bus: these signals address memory locations within the external memory. ma2/ sel_clkdrv 118 i/o8pd memory address bus: ma2 addresses memory locations within the external memory. sel_clkdrv. during nreset assertion, this pins will select the operating clock mode (crystal or externally driven clock source), and a weak pull-down resistor is enabled. when nreset is negated, the value will be internally latched and this pin will revert to ma2 functionality, the internal pull-down will be disabled. ?0? = crystal operation (24mhz only) ?1? = externally driven clock source (24mhz or 48mhz) note: if the latched value is ?1?, then the ma2 pin is tri-stated when the following conditions are true: 1. idle bit (pcon.0) is 1. 2. int2 is negated 3. sleep bit of clock_sel is 1. if the latched value is ?0?, then the ma2 pin will function identically to the ma[15:3] pins at all times (other th an during nreset assertion). symbol 128-pin vtqfp buffer type description
usb2227/usb2228 ds00002256a-page 12 ? 2007-2016 microchip technology inc. ma[1:0]/clk_se l[1:0] 117 116 i/o8pd memory address bus: ma[1:0], these signals address memory locations within the external memory. sel[1:0]. during nreset assertion, these pins will select the operating frequency of the external clock, and the corresponding weak pull-down resistors are e nabled. when nreset is negated, the value on these pins will be internal latched and these pins will revert to ma[1:0] functionality, the internal pull-downs will be disabled. sel[1:0] = ?00?. 24mhz sel[1:0] = ?01?. reserved sel[1:0] = ?10?. reserved sel[1:0] = ?11?. 48mhz note: if the latched value is ?1?, then the corresponding ma pin is tri-stated when the fo llowing conditions are true: 1. idle bit (pcon.0) is 1. 2. int2 is negated 3. sleep bit of clock_sel is 1. if the latched value is ?0?, th en the corresponding ma pin will function identically to the ma[15:3] pins at all times (other than during nreset assertion). nmwr 14 o8 memory write strobe: program memory write; active low nmrd 13 o8 memory read strobe: program memory read; active low nmce 17 o8 memory chip enable: program memory chip enable; active low. this signal is asserted, when any of the following conditions are no longer met: 1. idle bit (pcon.0) is 1. 2. int2 is negated 3. sleep bit of clock_sel is 1. note: this signal is held to a logic ?high? while nreset is asserted. misc gpio1 114 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. gpio2 113 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. gpio3 94 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. gpio4 111 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. symbol 128-pin vtqfp buffer type description
? 2007-2016 microchip technology inc. ds00002256a-page 13 usb2227/usb2228 gpio5 110 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. gpio6/ romen 109 ipu gpio6, romen: this pin has an internal weak pull-up resistor that is enabled or disabled by the state of nreset. the pull-up is enabled wh en nreset is active. the pull-up is disabled, when the nreset is inactive (some clock cycles later, after the rising edge of nreset). the state of this pin is latched internally on the rising edge of nreset to determine if internal or external program memory is used. the state latched is stored in romen bit of gpio_in1 register. i/o8 after the rising edge of nreset, this pin may be used as gpio6 or rxd. when pulled low via an external weak pull-down resistor, an external program memory shoul d be connected to the memory data bus. the usb2227/usb2228 uses this external bus for program execution. when this pin is left unconnected or pulled high by a weak pull- up resistor, the usb2227/usb2228 uses the internal rom for program execution. gpio7 107 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. gpio8/ crd_pwr0 42 i/o8 general purpose i/o or card power: gpio: this pin may be used eit her as input, edge sensitive interrupt input, or output. crd_pwr: card power drive of 3.3v @ 100ma. gpio9 105 i/o8 general purpose i/o: this pin may be used either as input, edge sensitive interrupt input, or output. gpio10/ crd_pwr1 79 i/o8 general purpose i/o or card power: gpio: these pins may be used either as input, edge sensitive interrupt input, or output. crd_pwr: card power drive of 3.3v @ 100ma. gpio11/ crd_pwr2 44 i/o8 general purpose i/o or card power: gpio: this pin may be used eit her as input, edge sensitive interrupt input, or output. crd_pwr: card power drive of 3.3v @ 200ma. gpio[15:12] 90 91 92 93 i/o8 general purpose i/o: these pins may be used either as input, or output. nreset 115 is reset input: this active low signal is used by the system to reset the chip. the active low pulse should be at least 1 ? s wide. symbol 128-pin vtqfp buffer type description
usb2227/usb2228 ds00002256a-page 14 ? 2007-2016 microchip technology inc. note 1: hot-insertion capable card connectors are required for all flash media. it is required for sd connector to have write protect switch. this allows the chip to detect mmc card. 2: nmce is normally asserted except when the 8051 is in standby mode. 3: vdd18 (pin 106) and vdd18pll (pin 101) must hav e a 10uf +/-20% low-esr (equivalent series resis- tance) <0.1 ohm bypass capacitor to vssa. these capaci tors must be as close to these pins as possible. 4.2 buffer type descriptions ntest[1:0] 95 96 i test input: these signals are used for testing the chip. user should normally tie them high externally, if t he test function is not used. digital power, grounds and no connects vdd18 49 106 1.8v digital core power: +1.8v core power all vdd18 pins must be connected together on the circuit board. vdd33 3 43 80 100 108 3.3v power & voltage regulator input: 3.3v power & regulator input. pins 100 & 108 supply 3.3v power to the internal 1.8v regulators. vss 15 16 47 84 85 97 112 ground: ground reference table 4-1: usb2227/usb2228 buffer type descriptions buffer description i input ipu input with internal weak pull-up resistor. ipd input with internal weak pull-down resistor. is input with schmitt trigger i/o8 input/output buffer with 8ma sink and 8ma source. i/o8pu input/output buffer with 8ma sink and 8ma source, with an internal weak pull-up resistor. i/o8pd input/output buffer with 8ma sink and 8ma source, with an internal weak pull-down resistor. o8 output buffer with 8ma sink and 8ma source. o8pu output buffer with 8ma sink and 8ma source, with an internal weak pull-up resistor. o8pd output buffer with 8ma sink and 8ma source, with an internal weak pull-down resistor. iclkx xtal clock input oclkx xtal clock output i/o-u analog input/output defined in usb specification aio analog input/output symbol 128-pin vtqfp buffer type description
? 2007-2016 microchip technology inc. ds00002256a-page 15 usb2227/usb2228 5.0 dc parameters 5.1 maximum ratings note 1: stresses above the specified parameters may cause pe rmanent damage to the device. this is a stress rat- ing only and functional operation of the device at an y condition above those indicated in the operation sec- tions of this specification is not implied. 2: when powering this device from laboratory or system powe r supplies, it is important that the absolute max- imum ratings not be exceeded or device failure can result. some power supplies exhibit voltage spikes on their outputs when the ac power is switched on or off. in addition, voltage transients on the ac power line may appear on the dc output. when this possibility ex ists, it is suggested that a clamp circuit be used. parameter symbol min max units comments storage temperature t a -55 150 c lead temperature 325 c soldering < 10 seconds 3.3v supply voltage v dd33, v dda33 -0.5 4.0 v voltage on gpio3 & usbdp/dm pins -0.5 (3.3v supply voltage + 2) ?? 6v voltage on gpio8,10&11 -0.5 v dd33 + 0.3 v when internal power fet operation of these pins is enabled, these pins may be simultaneously shorted to ground or any voltage up to 3.63v indefinitely, without damage to the device as long as v dd33 and v dda33 are less than 3.63v and t a is less than 70c. voltage on any signal pin -0.5 v dd33 + 0.3 v voltage on xtal1 -0.5 4.0 v voltage on xtal2 -0.5 v dd18 + 0.3 v
usb2227/usb2228 ds00002256a-page 16 ? 2007-2016 microchip technology inc. 5.2 recommended operating conditions 5.3 dc electrical characteristics parameter symbol min max units comments operating temperature t a 070c 3.3v supply voltage v dd33, v dda33 3.0 3.6 v voltage on gpio3 & usbdp/dm pins -0.3 5.5 v if any 3.3v supply voltage drops below 3.0v, then the max becomes: (3.3v supply voltage) + 0.5 ?? 5.5 voltage on any signal pin -0.3 v dd33 v voltage on xtal1 -0.3 v dda33 v voltage on xtal2 -0.3 v dd18 v parameter symbol min typ max units comments i,ipu & ipd type input buffer low input level high input level pull down pull up v ili v ihi pd pu 2.0 72 58 0.8 v v ? a ? a ttl levels is type input buffer low input level high input level hysteresis v ili v ihi v hysi 2.0 500 0.8 v v mv ttl levels iclk input buffer low input level high input level v ilck v ihck 2.2 0.4 v v input leakage (all i and is buffers) low input leakage high input leakage i il i ih -10 -10 +10 +10 ? a ma v in = 0 v in = v dd33
? 2007-2016 microchip technology inc. ds00002256a-page 17 usb2227/usb2228 o8. o8pu & 08pd type buffer low output level high output level output leakage pull down pull up v ol v oh i ol pd pu v dd33 - 0.4 -10 72 58 0.4 +10 v v ? a ? a ? a i ol = 8 ma @ v dd33 = 3.3v i oh = -8ma @ v dd33 = 3.3v v in = 0 to v dd33 ( note 5-1 ) i /o8, i/o8pu & i/o8pd type buffer low output level high output level output leakage pull down pull up v ol v oh i ol pd pu v dd33 ? 0.4 -10 72 58 0.4 +10 v v a a a i ol = 8 ma @ v dd33 = 3.3v i oh = -8 ma @ v dd33 = 3.3v v in = 0 to v dd33 ( note 5-1 ) io-u ( note 5-2 ) integrated power fet for gpio8 & gpio10 (and gpio11 when used with firmware version -03 or older) output current short circuit current limit on resistance output voltage rise time i out i sc r dson t dson 100 140 2.1 800 ma ma ? ? s gpio8 or 10; vdrop fet = 0.23v gpio8 or 10; vout fet = 0v gpio8 or 10; i fet = 70ma gpio8 or 10; c load = 10 ? f parameter symbol min typ max units comments
usb2227/usb2228 ds00002256a-page 18 ? 2007-2016 microchip technology inc. note 5-1 output leakage is measured with th e current pins in high impedance. note 5-2 see appendix a for usb dc electrical characteristics. note 5-3 the maximum power dissipation parameters of the package should not be exceeded note 5-4 the assignment of each integrated card power fet to a designated card connector is controlled by both firmware and the specific board implementati on. firmware will default to the settings listed in table 7-1, ?gpio usage (rom rev -11),? on page 20 . 5.4 capacitance t a = 25c; fc = 1mhz; v dd18, v dd18pll = 1.8v integrated power fet for gpio11 (only when used with firmware version -04 or later) output current short circuit current limit on resistance output voltage rise time i out i sc r dson t dson 200 181 2.1 800 ma ma ? ? s gpio11; vdrop fet = 0.46v gpio11; vout fet = 0v gpio11; i fet = 70ma gpio11; c load = 10 ? f supply current unconfigured i ccinit 55 80 ma supply current active (full speed) i cc 75 90 ma supply current active (high speed) i cc 75 100 ma supply current standby i csby 305 420 a limits parameter symbol min typ max unit test condition clock input capacitance c in 20 pf all pins except usb pins (and pins under test tied to ac ground) input capacitance c in 10 pf output capacitance c out 20 pf parameter symbol min typ max units comments
? 2007-2016 microchip technology inc. ds00002256a-page 19 usb2227/usb2228 6.0 package information figure 6-1: usb2227/usb2228 128-pin vtqf p pkg, 14 x 14 x 1.0mm body, 0.4mm pitch note: for the most current package drawings, see the microchip packaging specification at http://www.microchip.com/packaging
usb2227/usb2228 ds00002256a-page 20 ? 2007-2016 microchip technology inc. 7.0 gpio usage table 7-1: gpio usage (rom rev -11) name active level symbol description and note gpio1 h flash media activity led/ xd_door indicates media activity. media or usb cable must not be removed with led lit. also may be used for xd door functionality gpio2 h ee_cs serial ee prom chip select gpio3 h v_bus usb v bus detect gpio4 h ee_din/ee_dout/xdid serial ee prom input/output and xd identify gpio5 l hs_ind/sd_cd hs indicato r led or sd card detect switch input gpio6 h a16/romen a16 address line connect for dfu or debug led indicator optional. gpio7 h ee_clk/ unconf_led serial ee prom clock output or unconfigured led. gpio8 l ms_pwr_ctrl/ crd_pwr0 memory stick card power control, or internal power fet0. gpio9 l cf_pwr_ctrl compactflash card power control gpio10 l sm_pwr_ctrl/ crd_pwr1 smartmedia card power control, or internal power fet1. gpio11 l sd/mmc_pwr_ctrl/ crd_pwr2 sd/mmc card power co ntrol, or internal power fet2. gpio12 h ms_act_ind/ media activity memory stick activity indicator, or media activity led. gpio13 h cf_act_ind compactflash activity indicator gpio14 h sm_act_ind smartm edia activity indicator gpio15 h sd/mmc_act_ind sd/mmc activity indicator
? 2007-2016 microchip technology inc. ds00002256a-page 21 usb2227/usb2228 appendix a: data sheet revision history table a-1: revision history revision section/figure/entry correction ds00002256a (08-02-16) replaces previous smsc version rev. 1.93 (11-01-07)
usb2227/usb2228 ds00002256a-page 22 ? 2007-2016 microchip technology inc. the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site con- tains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), te chnical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of semi- nars and events, listings of microchip sales offi ces, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep custom ers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisi ons or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under ?support?, click on ?customer change notifi- cation? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this docu- ment. technical support is available through the web site at: http://www.microchip.com/support
? 2007-2016 microchip technology inc. ds00002256a-page 23 usb2227/usb2228 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: usb2227, usb2228 temperature range: blank = 0 ? c to +70 ? c (commercial) package: nu = 128-pin vtqfp part no. [x] xxx package temperature range device [x] internal microchip code - - examples: USB2227-NU-11 128-pin vtqfp rohs compliant pack- age, commercial temp, tray usb2228-nu-11 128-pin vtqfp rohs compliant pack- age, commercial temp, tray
usb2227/usb2228 ds00002256a-page 24 ? 2007-2016 microchip technology inc. information contained in this publication re garding device applications and the like is provided only for your convenience and may be super- seded by updates. it is your responsibility to ensure that your application meets with your s pecifications. microchip makes no rep- resentations or warranties of any kind whether ex press or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fi tness for purpose . microchip disclaims all liability arising from this information and its use. use of micro- chip devices in life support and/or safety applications is entire ly at the buyer?s risk, and the buyer agrees to defend, indemn ify and hold harmless microchip from any and all damages, cl aims, suits, or expenses resulting from such use. no licens es are conveyed, impl icitly or otherwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, klee r, lancheck, link md, medialb, most, most logo, mplab, optolyze r, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered tradem arks of microchip technology incorporat ed in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, body com, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit se rial programming, icsp, inter-c hip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem. net, pickit, pictail, puresilicon, righttouc h logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, vari sense, viewspan, wiperlock, wireless dna, and zena are trademarks of mi crochip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchi p technology incorporated in the u.s.a. silicon storage technology is a regi stered trademark of microchip tech nology inc. in other countries. gestic is a registered trademarks of micr ochip technology germany ii gmbh & co. kg, a subsidiary of microc hip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2007-2016, microchip technology incorporated, pr inted in the u.s.a., all rights reserved. isbn: 9781522408444 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microper ipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem by dnv == iso/ts 16949 ==
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